Double Layer PCB (2L)
The most common PCB type in the industry: copper on both faces, joined by plated through-holes. Here's exactly how a double-sided board is built, what it's made of, how to lay it out well, and which IPC classes and tolerances apply.
Two copper layers, joined by plated holes
A double-sided board has copper on both the top and bottom of the substrate, electrically connected through plated through-holes (PTH) — mechanically drilled holes whose walls are made conductive by copper deposition. That plated hole is the entire reason double-sided boards exist: it's what lets a signal cross from one face to the other, and it's the one process step that simply doesn't exist on a single-layer board.
Sitting between single-layer (simple, cheapest) and multilayer (dense, most capable), double-sided is the workhorse of the industry — good electrical performance, real routing flexibility from two layers, and still straightforward, fast, and low-cost to build.
- General consumer electronics — audio, power supplies, appliances
- Automotive modules — ECUs, LED lighting, sensor interfaces
- Industrial controls — PLCs, motor drives, instrumentation
- Telecom equipment — routers, modems, network hardware
- The default choice once a design outgrows single-layer
The manufacturing process, step by step
The defining difference from single-layer: holes are drilled before the copper is plated, because the plating is what actually joins the two layers together.
Material preparation
FR4 core with copper foil pre-laminated on both faces, checked against the design's trace/space/hole rules before production starts.
Drilling
Every through-hole is mechanically drilled first — at this stage the hole walls are still bare, non-conductive fiberglass, with all the debris and resin smear then cleaned off.
Electroless copper
Since the hole wall isn't conductive yet, a thin chemical (electroless) copper seed layer is deposited on it first — the step that makes plating possible at all.
Electrolytic plating
That seed layer is built up by electrolytic copper plating, on the hole walls and the board surface together — this is the plated-through-hole that actually joins top and bottom copper.
Imaging
Photoresist is applied to both sides and imaged with the circuit pattern, defining exactly what stays as copper and what gets etched away next.
Pattern plating
The exposed circuit pattern — and the hole walls — receive additional copper plating on both sides together, building up to the final target thickness.
Etching
Resist is stripped and the panel is etched, removing all the unwanted copper and leaving the finished circuit pattern on both faces.
Solder mask
Applied to both sides to insulate the copper traces and prevent solder bridging during assembly.
Silk screen
Legend and reference markings are printed on one or both sides as the design requires.
Surface finish
Applied over every exposed pad on both sides for reliable, oxidation-free soldering.
Routing
Boards are cut from the production panel to their final outline.
Electrical test
This now specifically verifies hole-to-hole and layer-to-layer continuity and isolation — not just single-plane continuity as on a 1-layer board.
Final QC
Optical inspection plus final visual/dimensional check, often backed by cross-section sampling to verify plating quality, before packing.
FR4, plating thickness and finish
Substrate is standard FR4, with copper weight sometimes specified differently top vs. bottom — though matching both sides is usually the safer default, since an uneven copper weight between faces unbalances the board around its centerline and adds thermal stress during reflow and hot-air levelling, which can promote warping. The hole-wall copper itself has a real, standards-driven minimum: IPC-6012 requires an average plated thickness around 20 µm (0.8 mil) for Class 2 and 25 µm (1 mil) for Class 3 — thin, unreliable plating in the barrel is exactly what causes intermittent or failed connections later.
| Surface finish | Best for | Trade-off |
|---|---|---|
| HASL-LF | General-purpose, through-hole-heavy boards | Least expensive; not ideal for fine-pitch/BGA |
| ENIG | Fine-pitch, BGA, longer shelf life | Flatter surface, higher cost |
| Immersion Silver | RF designs, excellent electrical performance | Tarnish-sensitive, shorter shelf life |
| Immersion Tin | RoHS-compliant, lower cost than ENIG | Tin-whisker and handling risk |
Layout & DFM guidelines for double-layer boards
Two layers open up real routing strategy — ground planning matters as much as signal routing.
IPC classes & quality standards
Plated-hole quality is where double-sided boards first really start to lean on IPC's framework.
| IPC-6012 Class | Typical use | Min. hole-wall copper |
|---|---|---|
| Class 1 | General consumer electronics | — |
| Class 2 | Dedicated-service electronics — most common baseline | ≈ 20 µm (0.8 mil) |
| Class 3 | High-reliability — medical, aerospace, military | ≈ 25 µm (1 mil) |
IPC-A-600 is the visual acceptance-criteria companion to 6012, and for plated holes specifically it's what defines defects like voids (a gap or discontinuity in the hole-wall copper, usually from poor throwing power or trapped contamination during electrolytic plating) and wicking (capillary penetration of plating chemistry along exposed glass fibers) — both checked during cross-section inspection. IPC-2221 still governs trace-width-vs-current sizing; both layers on a 2-layer board count as external/outer layers, so both get the more favorable current-carrying coefficient in that model.
Our real specs for double-layer boards
Everything above is general industry practice. This is what we actually build, in-house, in Iași.
| Board thickness | 0.51 – 2.4 mm |
| Copper weight | 18 / 35 / 50 / 70 µm |
| Glass transition (Tg) | 135 °C standard, 150 °C or 170 °C on request |
| Minimum track / isolation | 0.15 mm / 0.15 mm |
| Minimum drill | 0.3 mm (0.5 mm pad) |
| Maximum panel (1–2 layer) | 390 × 520 mm |
| Solder mask | Green, white, black, red, blue, yellow |
| Surface finish | HASL-LF (Pb-free, RoHS compliant) |
| Testing | 100% electrical test (short circuit and open circuit, flying probe) and AOI inspection on every board |
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